Computer Organization and architecture question bank with answers pdf

MCQs on Computer Architecture – Sanfoundry computer architecture. Computer organization and architecture MCQ question bank with answers pdf.

Computer Organization and architecture question bank with answers pdf

1) The sum of two octal numbers 12 and 17 would be in octal as
a) 21
b) 23
c) 29
d) 31
Ans: d

2) The sum of two Hexadecimal numbers 23D and 9AA gives the hexadecimal number
a) BE7
b) BE5
c) BF6
d) AF7
Ans: a

3) The number of select lines required for a to 1 multiplexer is
a) 1
b) 3
c) 8
d) 256
Ans: c

4) Which of the following gates recognizes only words that have an odd number of 1s
b) XOR
c) NOR
d) None of these
Ans: b

5) If even parity mechanism is being used in a system using ASCII code for data transfer, the incorrect receipt data byte is
a) B5
b) 1
c) 2
d) None of these
Ans: b

6) Any combinational circuit can be implemented by using the following building block
a) AND
c) OR
d) None of these
Ans: b

7) The number of the memory location that a CPU with a 16-bit program counter can address
a) 16k
b) 64k
c) 256k
d) 32 k
Ans: b

8) The following logic building block can be used to implement any combinational logic circuit
a) Decoder
b) Multiplexer
c) Ex-Or gate
d) Encoder
Ans: b

9) A module 20 counter can be designed using
a) 4 flip-flops
b) 20 flip-flops
c) 5 flip-flops
d) None of these
Ans: a

10) A computer stores its data in memory
a) Decimal form
b) Octal form
c) Hexadecimal form
d) Binary form
Ans: d

11) The least negative value that the product of two 8-bit 2’s complement number can take is
a) -214
b) -215
c) -216
d) None of these
Ans: b

12) The simplified form of the expression AB+ABC’ is
a) AB
b) A(B+C)
c) A(B+C)’
d) None of these
Ans: a

13) In half subtractor borrow is obtained by (for inputs A & B)
a) AB
b) A’B
c) A’B’
d) None of these
Ans: b

14) The numbers in the range -23 to +31 is represented by the minimum number of bits
a) 6
b) 8
c) 7
d) 5
Ans: d

15) Which of the following is a unit of measurement with computer systems
a) Byte
b) Megabyte
c) Kilobyte
d) All of the above
Ans: d

16) The number of select input lines in a 16-to-1 multiplexer is
a) 4
b) 8
c) 1
d) None of the above
Ans: a

17) Code segment register is where the microprocessor looks for
a) Stack
b) Data
c) Instruction
d) Operand

18) In register addressing mode operands are looked at
a) In cache
b) In secondary storage
c) In CPU
d) In primary memory
Ans: c

19) BCD stands for
a) Boolean code definition
b) Binary coded division
c) Binary coded decimal
d) None of the above
Ans: c

20) The basic circuit of ECL supports the
a) NAND logic
b) NOR logic
c) EX-OR logic
d) OR-NOR logic
Ans: d

21) In a half – adder, CARRY is obtained by using
a) OR gate
b) NAND gate
c) AND gate
d) EX-NOR gate
Ans: c

22) If the radix point (binary point) is fixed and assumed to be on the right of the rightmost digit, the representation of such a number is called
a) Fixed point
b) Floating point
c) Radix point
d) None of these
Ans: a

23) Which of the following memory elements uses an RC circuit as its input?
a) Unclocked D latch
b) Level-clocked D latch
c) Edge – triggered D flip-flop
d) None of the above
Ans: c

24) The minimum hardware required to construct a 3-to-8 decoder is using
a) Two 2-to-4 decoders
b) Two 2-to-4 decoders and two 1-to-2 decoders
c) Depends upon the technology (TTL, CMOS, etc.)
d) None of the above
Ans: a

25) Two 4-bit 2’s complement numbers are added using a ripple carry adder, the range of the sum output is
a) -128 to +127
b) -256 to +255
c) -512 to + 511
d) -256 to + 256
Ans: a

26) Octal number system is
a) A positional system with weights 0 to 9
b) A positional system with weights 0 to 8
c) A positional system with weights 0 to 7
d) A non-positional system with weights 0 to 7
Ans: c

27) A 4 digit BCD number can be represented with the help of
a) 10 bits
b) 8 bits
c) 12 bits
d) 16 bits
Ans: d

28) A truth table of the n variables has … Minterms
a) N2
b) (n-1)2
c) 2n
d) 2n-1
Ans: c

29) Which of the following shift operations divide a signed binary number of 2
a) Logical left shift
b) Logical right shift
c) Arithmetic left shift
d) Arithmetic right shift
Ans: d

30) A combinational circuit that converts binary information from n coded inputs to a maximum of 2n unique outputs called as
a) Encoder
b) Decoder
c) Multiplexer
d) Demultiplexer
Ans: b

31) Decimal equivalent of the binary number 101001.1011 is
a) 41.0875
b) 41.06875
c) 416875
d) 40.0875
Ans: b

32) The half adder performs
a) Decimal addition operation for 2 decimal inputs
b) Binary addition operation for 2 binary inputs
c) Decimal addition operation for 2 binary inputs
d) Binary addition operation for 2 decimal inputs
Ans: b

33) A flip-flop circuit can be used for
a) Counting
b) Scaling
c) Rectification
d) Demodulation
Ans: a

34) Normally digital computers are based on
a) AND and OR gates
b) NAND and NOR gates
c) Not gate
d) None of these
Ans: b

35) Which one does not change the information content during the movement of binary information in registers
a) Register transfer micro-operations
b) Arithmetic operations
c) Logic operations
d) None of the above
Ans: a

36) Using Binary division, divide 1011011 by 111
a) 101.01
b) 1011
c) 011.01
d) 1101
Ans: b

37) The ‘T’ in the flip flop stands for ……………………..
a) Time
b) Transfer
c) Toggle
d) Trigger
Ans: c

38) Which of the following statements is wrong?
a) Propagation delay is the time required for a gate to change its state.
b) The noise immunity is the amount of noise that can be applied to the input of agate without causing the gate to change state.
c) Fan-in of a gate is always equal to fan-out of the same gate
d) Operating speed is the maximum frequency at which digital data can be applied to a gate.
Ans: c

39) The functional capacity of SSI devices is
a) 1-11 gates
b) 12 to 99 gates
c) 100 to 10,000 gates
d) more than 10000 gates
Ans: a

40) The functional capacity of VLSI devices is
a) 1-11 gates
b) 12 to 99 gates
c) 100 to 10,000 gates
d) more than 10000 gates
Ans: d

41) Let X and Y be the input and Z be the output of the XOR gate, the value of the Z is given by :
a) X+Y
b) X.Y
c) (X.Y)’
d) X’.Y + X.Y’
Ans: d

42) The NAND can function as a NOT gate if (A.B)’=A’+B’
a) Inputs are connected together
b) One input is set to 0
c) One input is set to 1
d) Both a and c
Ans: d

43) Which one of the following Boolean expression represents the SUM output of a HALF-ADDER.
a) A.B
b) A+B
c) A’.B’+A.B
d) A.B’+A’.B
Ans: a

44) A JK flip flop has its J input connected to logic level1 and its input to the Q output. A clock pulse is fed to its clock input. The flip – flop will now
a) Change its state at each clock pulse
b) go to state 1 and stay there
c) go to state 0 and stay there
d) retains its previous state
Ans: d

45) The main difference between JK and RS flip-flop is that
a) JK flip-flop does not need a clock pulse.
b) there is feedback in the JK flip-flop
c) JK flip-flop accepts both inputs as 1
d) JK flip-flop is the acronym of Junction cathode multivibrator
Ans: c

46) The minterms corresponding to decimal number 15 is
b) (ABCD)’
c) A+B+C+D
d) A’+B’+C’+D’
Ans: d

47) The resolution of the D/A converter is approximately 0.4% of its full-scale range. It is a
a) 8 – bit converter
b) 10 – bit converter
c) 12– bit converter
d) 16– bit converter
Ans: a

48) The operation which is cumulative but not associative is
a) AND
b) OR
c) EX-OR
Ans: d

49) The dual of the boolean theorm A.(B+C) = A.B + A.C is
a) A + (B+C) = A.B + A.C
b) A.(B+C) = (A+B) + (A+C)
c) A+B.C = (A+B) + (A+C)
d) None of these
Ans: c

50) Which is true
A. For the pipelines – when an instruction is installed, all instructions issued.
B. Hazards in the pipelines can make it necessary to stall the pipelines
C. New instructions are fetched during the stall
D. Control Hazards can cause a greater performance loss than the data hazards
a) A & B
b) A, C, & D only
c) A, B & D Only
d) Except A all
Ans: c

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